New Reservation Station Operand Design

A couple things I can do to optimize the size of reservation stations.

• Don't store data in the reservation station itself. Instead, store only the tag of the operand. This saves a ton of luts and flipflops because multiplexers are expensive in FPGAs, and without the data, we significantly reduce the width of the multiplexer required. We also don't need a multiplexer from each of the write-back busses because we don't need to save the data. Data for outstanding tags can be stored in a special register-file because register files can be implemented as distributed RAM. This basically combines the storage and multiplexer into one relatively tiny alternative. The drawback is that the in-flight register file will need two read ports for each functional unit and one write port for each write-back bus (there are some time-multiplexing tricks to alleviate this issue). This should still be cheaper.
• Something like 90% of instructions have only one or none of their operands outstanding. Therefore, most reservation stations only need to compare one operand at a time. This allows us to save a bit on comparators (which are relatively cheap in the Spartan 3 fabric).
  

The utilization savings are huge:

• 7 slices VS 82 slices
  
• 6 flipflops VS 39 flipflops
  
• 10 LUTs VS 200 LUTs

Something like 10 times smaller. Also somewhat faster (~200MHz). Hopefully this is correct and will work out.